Andhra University BE/B.Tech Digital Logic Design Previous Paper 2006
Answer question number one and any four from the rest.
All questions carry equal marks
1. Answer all questions
(a) Solve for X in the following
(b)Define prime implicates and essential prime implications
(c)Design a full adder using two half adders and logic gates
(d)Distinguish between synchronous and Asynchronous sequential circuits
(e)What is a race condition in flip flop? How it can be eliminated?
(f) Explain what do you understand by a lock out in a counter?
(g) find the complement of F=X’YZ’+ (XY)’Z.
2. (a)determine the canonical form for
(b) simplify F(PQR)=PQ+QR+Q’+R’
© verify the following Boolean algebraic manipulations and justify each step with reference to a theorem or postulate (X+Y’+XY)(XY+X’Z+YZ)=XY+(XY)’Z
3.(a) Determine the sum of products realization for the following using tabulation method
(B) obtain the product of sums realizations of the following junctions and implement it using nand gates after minimization
4. (A) it is necessary to multiply two binary numbers, each two bits long,inorder to form their product in binary. Let the two numbers be represented by ai,a0 and b11 b0 where subscript ‘0’denotes the least significant bit. Find the simplified Boolean expression for each output and realize then using nand gates.
(b)Give the truth table of a 4 to 1 multiplexer. Realize it using nand gates explain how you can use this for parallel to serial conversion of data?
5 Draw the logic diagram of 4 bit binary adder and explain it operation with an illustrative example?
(a) (b) design a full subtractor and implement it using nand gates . explain its operation with the help of truth table?
6. Realize an edge triggered JK flip flop with SET and RESERT inputs using Nand gates and explain its operations with truth tables and wave forms?
(a) Convert clock RS flip flop in to
(i)JK flip flop
(ii)D flip flop
(ii)T flip flop give the truth table for each list applications of each?
7.(a) Explain the operation of a 4 bit ring counter with the help of circuit diagram and wave forms?
(b) design and realize the modulo 6 synchronous counter using JK flip flop and nand gates?
8.(a) draw and explain the architecture and READ AND WRITE operations of a PROM?
(b)design a RAM system of 64 K * 8 bit capacity using 8 K *4 bit RAM devices .show the address decoding and chip select lines .explain its operations?http://www.stepinau.com/2013/09/26/andhra-university-beb-tech-digital-logic-design-previous-paper-2006/IT 2.1 Previous PapersCSE,CSE Previous Papers,Digital Logic Design Previous Papers,IT,IT Previous Papers